Description
an increasing the switching frequency can improve the dynamics of power converters, but the efficiency may be degraded. Varying the efficiency and dynamics of power converters is a concern in power electronics. This converter has two buck cells one works at high frequency and another works at low frequency. It works that current in the high-frequency switch is diverted through the low-frequency switch. The converter operates at a very high frequency without adding control circuits. The switching loss of the converter remains small. This project is increased the steady-state and transient response with low switching losses. Double frequency buck converter voltage depends on the high-frequency buck cell parameters and is independent of the low-frequency buck cell parameters. This PDF buck converter greatly improves the efficiency and exhibits nearly the same dynamics as the conventional high-frequency buck converter. This project can be extended to other dc-dc converters by the double frequency switch inductor and three-terminal network structure.
EXISTING SYSTEM
The demand for high-performance power converters is increased dramatically with the broadening of power converter?s application fields. In order to improve the transient and steady-state performance of power converters and to enhance power density, the high switching frequency is an effective method. However, switching frequency rise causes higher switching losses and greater electromagnetic interference. This, in turn, limits the increase of switching frequency and hinders the improvement of system performance. Active and passive soft-switching techniques have been introduced to reduce switching losses. While these can create more favorable switching trajectories for active power devices, they will generally increase the complexity of control and sometimes are affected by the variable input and output condition.
PROPOSED SYSTEM
This paper proposes a novel converter topology to achieve high dynamic response and high efficiency of buck-type converters. This topology consists of a high-frequency buck cell and a low-frequency buck cell, and we call it the ?double frequency buck converter? (DF buck). The current flowing through the high-frequency cell is diverted by the low-frequency one, which also processes the majority of the converter power. This current decreases rapidly so that the high-frequency cell can work at a very high frequency to improve the dynamic response. Furthermore, the efficiency is enhanced due to the low-current processing requirement of the high-frequency cell in the DF buck converter. Unlike the parallel structure, the proposed converter does not incur the circulating current problem. Moreover, it is not required to detect the load transient event for control. The circuit configuration and control strategy will be described in detail. The frequency-domain and time-domain analyses are given to show that the proposed topology has the same transient and steady-state performance as the single high-frequency buck converter.
BLOCK DIAGRAM
HARDWARE & SOFTWARE REQUIREMENTS
HARDWARE
- PIC microcontroller(PIC16F877A)
Double Frequency Buck Converter 2 - Driver Board
Double Frequency Buck Converter 3
SOFTWARE
- Matlab/Simulink
RESULT
CONCLUSIONS
This project is used to improve the efficiency of the conventional buck converter and also steady-state transient response. The proposed converter does not need the load transient change information for accurate current control and does not have the current circulating problem. Extension to double-frequency switch-inductor three-terminal Network has also been described. Future work will investigate whether the proposed buck converter is applicable for high current or high dynamics specifications.
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